In next generation wireless communication system, wireless transceiversshould be able to handle wideband input signals compromising of multiplecommunication standards.Such multi-standard wireless communication receivers(MWCRs) need filter bank to extract the desired signal of interest fromwideband input spectrum and bring it to the baseband for further signalprocessing tasks such as spectrum sensing, modulationclassification,demodulation etc.In MWCRs,rather any wireless receivers,modulated filter banks, such as Discrete Fourier Transform Filter Banks(DFTFB), are preferred due to their advantages such as lower area, delay andpower requirements. To support multi-standard operation, reconfigurable DFTFB(RDFTFB) was proposed by integrating DFTFB with the coefficient decimationmethod. In this paper, an efficient high speed implementation of RDFTFB onVirtex-7 field programmable gate arrays (FPGA) has been proposed.The proposedapproach minimizes the critical path delay between clocked registers therebyleading to significant improvement in the maximum operating frequency of theRDFTFB. Numerically, the proposed implementation leads to 89.7% improvement inthe maximum frequency at which RDFTFB can be clocked.Furthermore,proposedimplementation leads to 18.5% reduction in the dynamic power consumption.
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